Security Architect, Devices and Services

Employment Type

: Full-Time

Industry

: Miscellaneous



Minimum qualifications: * Bachelor's degree or equivalent practical experience. * 5 years of work experience in embedded security architecture, hardware design or software design. Preferred qualifications: * Master's degree or PhD in Computer Science or Electrical Engineering. * 10 years of relevant work experience. * Experience architecting or designing security infrastructure or IP cores for ASICs. * Experience in one or more of the following: secure debug and test infrastructure, RMA enablement, secure boot and firmware update and recovery mechanisms, security evaluation and certification processes, power/clock/reset management and security integration, device lifecycle management, and/or OTP and PUF technologies. * Experience with cryptographic algorithms and protocols. * Experience performing hardware/software threat analyses, security and risk analyses. About the job As a member of the Silicon Security Architecture team, you will contribute to architecting security features for Mobile SoCs (System-on-Chip) and Titan line of security microcontrollers. You will work with multiple teams to help define silicon security features.Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology. Responsibilities * Help define innovative security features for a large and complex heterogeneous ASIC. * Bridge the gap between hardware and software architecture definition by defining software interfaces for security HW IPs, defining strategy for petitioning use cases and mapping those parts to various security HW IPs and defining, tracking and optimizing for relevant system-level key performance indicators (KPI). * Work with cross-functional teams to ensure architected features are successfully deployed in product. * Identify potential vulnerabilities in ASIC supply chain and define innovative solutions to address them. * Ensure that the defined solutions integrate well with the operational logistics of silicon manufacturing, test, bringup, and SW development flows.

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